Watch Your Code Come to Life: RISC-V Simulator 'Ripes' Explained!

to write, assemble, and simulate both RISC-V assembly and C programs while visualizing exactly how instructions move through your processor — cycle by cycle.

In this video, we’ll explore:

Writing and executing assembly code

Watching instructions move through the pipeline

Cache behavior and performance visualization

Compiling and simulating C programs

Comparing different processor models (single-cycle, pipelined, dual-issue)

Whether you're a student, educator, or just curious about how CPUs work under the hood — Ripes turns abstract theory into interactive learning.

🔗 Try Ripes here: ripes.me/

💻 Ripes GitHub: github.com/mortbopet/Ripes

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